Skip to main content

Simultaneous Multithreading wins ISCA “Test of Time Award” AGAIN!

Each year, the International Symposium on Computer Architecture – the premier forum for computer architecture research – presents the “Test of Time Award” to “the paper from the ISCA Proceedings 15 years earlier that has had the most impact on the field (in terms of research, development, products or ideas) during the intervening years.”

For the second year in a row, a paper describing UW CSE research on Simultaneous Multithreading (SMT) has won this award!

This year’s award goes to the ISCA 1996 paper “Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor” by Dean Tullsen, Susan Eggers, Joel Emer, Hank Levy, Jack Lo, and Rebecca Stamm.

This paper was a successor to last year’s ISCA Test of Time Award winner, “Simultaneous Multithreading:  Maximizing On-Chip Parallelism” by Dean Tullsen, Susan Eggers, and Hank Levy.

Congratulations to Susan and Hank, and to their then-students Dean Tullsen (now at UCSD) and Jack Lo (now at VMware), and their collaborators Rebecca Stamm and Joel Emer!

The ISCA “Test of Time Award” has been given annually since 2003  – 9 times in total.  Three of those awards have gone to UW CSE papers – the two SMT papers, recognized in 2010 and 2011, and the paper “On the Inclusion Properties for Multi-Level Cache Hierarchies” by Jean-Loup Baer and his student Wen-Hann Wang (now at Intel), which received the inaugural ISCA “Test of Time Award” in 2003.